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I2C: clock speed per bus instead of one for all, and an MSP list of buses and sensors - #12148

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MrScothh wants to merge 2 commits into
iNavFlight:maintenance-11.xfrom
MrScothh:feature/i2c-bus-speed
Open

MrScothh wants to merge 2 commits into
iNavFlight:maintenance-11.xfrom
MrScothh:feature/i2c-bus-speed

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@MrScothh

@MrScothh MrScothh commented Oct 13, 2026 •

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i2c_speed sets one clock for every I2C bus. On a board with the compass on one bus and the barometer on another, the slower chip decides for both: an IST8310 is rated for 400 kHz, so the barometer can't run at 800 kHz either, though the Configurator suggests it. This replaces i2c_speed with one setting per bus, and adds an MSP message that lists the buses with the sensors on each, so the Configurator can show what shares a bus before a speed is raised (iNavFlight/inav-configurator#2835).

It targets maintenance-11.x because it removes a setting and changes the layout of a parameter group.

What changes

  • i2c_speed is gone. i2c1_speed to i2c4_speed take its place, each only on targets that enable that bus (USE_I2C_DEVICE_n), with the same values plus 1000KHZ and 400KHZ as default. They're stored in a new parameter group, PG_I2C_BUS_CONFIG (1054; 1048 to 1053 are claimed by open PRs). On a board with software I2C (MATEKF405OSD), i2c1_speed sets that bus.
  • 1000KHZ (Fast-mode Plus) is new. F7, H7 and AT32 compute its timing with the Fm+ figures that 800KHZ already uses, RP2350 sets the baud rate, and F4 runs past its I2C rating there, as it already does at 800KHZ. I don't set the Fm+ drive bits: they only matter with pull-ups stronger than the usual 2.2 to 4.7 kΩ. With slow edges the I2C peripheral waits for the clock line to rise, so a bus with weak pull-ups or long wires runs slower than 1 MHz, or fails.
  • i2cSetSpeed() now takes the bus, and i2cIsInitialised() is new, in every I2C driver (HAL, F4, AT32, RP2350 and software).
  • New MSP2_INAV_I2C_BUSES (0x2238, out): every bus the board started, then every detected accelerometer, barometer, compass, rangefinder and pitot sensor on I2C, with its bus, address, role (sensorIndex_e) and hardware (its *_hardware value). A bus that shares its pins with a UART in use isn't started, so it's left out. A software bus is reported as I2C1 with bit 7 of the bus number set. It's documented in msp_messages.json (patch version up).

Upgrade

Removing i2c_speed from systemConfig_t changes its layout, so PG_SYSTEM_CONFIG goes from version 11 to 12 (7 to 8 on targets without USE_AUTO_TRANSITION). That group returns to its defaults on the first boot after the upgrade:

  • the current profile, battery profile and mixer profile;
  • debug_mode and throttle_tilt_comp_str;
  • the VTOL auto transition settings (vtol_*);
  • name and pilot_name.

Pasting a diff all taken before the upgrade restores them. A set i2c_speed = ... line in that diff now gives an error, and every bus starts at 400KHZ until its i2cN_speed is set.

Size

Against maintenance-11.x:

Target Flash RAM
MATEKF722 +244 B (95.89 % used) 0
MATEKF405 +284 B +16 B
MATEKF405OSD (software I2C) +300 B +8 B
KAKUTEF7 / KAKUTEF7HDV +276 / +316 B 0
TBS_LUCID_H7_WING +332 B 0

Most of it is the MSP message. Nothing new runs from the scheduler, and the KAKUTEF7 and KAKUTEF7HDV ITCM doesn't change.

Testing

  • Builds with WARNINGS_AS_ERRORS: TBS_LUCID_H7_WING, MATEKF722, MATEKF405, MATEKF405OSD (software I2C), MATEKF411, OMNIBUSF4 (I2C2 shares UART3), KAKUTEF7, KAKUTEF7HDV, KAKUTEH7WING (I2C4), BLUEBERRYF435WING (AT32) and RP2350_PICO. All 559 unit tests pass.

  • TBS Lucid H7 Wing, with an IST8310 compass on I2C1 (through the GPS cable) and the DPS310 on I2C2. The message listed both buses and both sensors at the right addresses. The compass task time followed the I2C1 clock while I2C2 was set to something else:

    i2c1_speed COMPASS task, average
    100KHZ 836 µs
    400KHZ 204 µs
    800KHZ 104 µs
    1000KHZ 83 µs

    The IST8310 is rated for 400 kHz: the 800 and 1000 kHz rows only show that the clock changes, they're not a recommendation. With I2C2 at 1000KHZ the DPS310 kept working and the I2C error count didn't move.

Not tested

  • 1000KHZ on F4, F7 and AT32: only H7 ran at 1 MHz. AT32 and RP2350 are build-only.
  • The software bus on MATEKF405OSD: i2c1_speed, and the "I2C1 (software)" row in the Configurator.

Overlaps

  • I test-merged this with the open PRs against maintenance-11.x that touch the same files (Add dshot_reversed_motors: per-motor spin direction via DShot commands 20/21 #12022): no conflicts.
  • After this PR, merging maintenance-10.x into maintenance-11.x conflicts in the MSP id list and the MSP docs (msp_protocol_v2_inav.h, msp_messages.json, README.md): additions next to each other, where both sides stay. When other parameter groups come in, PG_INAV_END has to stay at the highest id (1054), or MSP2_COMMON_PG_LIST leaves this group out.

… the buses

i2c_speed set one clock for every bus, so a bus with a chip limited to
400 kHz held back a barometer on another bus that could run at 800 kHz.
It is replaced by i2c1_speed..i2c4_speed (new PG, only for the buses a
target enables; i2c1_speed also sets a software I2C bus). The field
leaves systemConfig, whose PG version goes up: that group returns to its
defaults on upgrade. 1000KHZ joins the speeds, for a bus whose chips all
support Fast-mode Plus.

MSP2_INAV_I2C_BUSES (0x2238) reports each started bus with the clock it
runs at and the detected accelerometer, barometer, compass, rangefinder
and pitot sensors on it (bus, address, role, *_hardware value), so a
configurator can show what shares a bus before raising its speed.
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The Configurator shows each bus's i2cN_speed, and it reboots the board
when it saves, so the clock the message reported only repeated it. The
field goes, and with it i2cGetSpeed(), which had no other caller.
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github-actions Bot commented Oct 13, 2026 •

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RAM / Flash usage vs. base commit 7e82f68 — commit 399e7a9

Target Flash Δ RAM Δ
MATEKF405 +284 B (+0.04%) CCM: ±0 B (±0.00%)
RAM: +16 B (+0.01%)
MATEKF722 +244 B (+0.05%) ITCM_RAM: ±0 B (±0.00%)
RAM: ±0 B (±0.00%)
TCM: ±0 B (±0.00%)
MATEKF765 +316 B (+0.04%) DTCM_RAM: ±0 B (±0.00%)
SRAM1: +16 B (+0.01%)
MATEKH743 +316 B (+0.04%) D2_RAM: ±0 B (±0.00%)
DTCM_RAM: ±0 B (±0.00%)
ITCM_RAM: ±0 B (±0.00%)
RAM: ±0 B (±0.00%)

See RAM/flash optimization guide for techniques to reduce usage.

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Test firmware build ready — commit 399e7a9

Download firmware for PR #12148

249 targets built. Find your board's .hex file by name on that page (e.g. MATEKF405SE.hex). Files are individually downloadable — no GitHub login required.

Development build for testing only. Use Full Chip Erase when flashing.

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