cache-simulation

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Jamescorino8 / cpu-simulator

A 16-bit CPU simulator built from the bit up in Java, with a cycle-count study of four cache configurations. Gate-level adder, multiplier and shifter, an ALU, simulated DRAM, a two-level cache hierarchy, an assembler, and a processor.

java maven processor assembler junit computer-architecture alu instruction-set-architecture cpu-simulator cache-simulation

Updated Sep 26, 2026
Java

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